The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for an add-on memory coherence directory for multiple processor computer systems.
Memory coherence is an issue that affects the design of computer systems in which two or more processors or cores share a common area of memory. In a single processor system, there is only one processing element doing all the work and, therefore, only one processing element that can read to or write from a given memory location. As a result, when a value is changed, all subsequent read operations of the corresponding memory location will see the updated value, even if it is cached.
Conversely, in multiprocessor (or multicore) systems, there are two or more processing elements working at the same time, and so it is possible that they simultaneously access the same memory location. Provided none of the processors changes the data in this location, the processor can share the data indefinitely and cache the data as it pleases. But as soon as a processor updates the location, the other processors might work on an out-of-date copy that may reside in its local cache. Consequently, some scheme is required to notify all the processing elements of changes to shared values; such a scheme is known as a “memory coherence protocol,” and if such a protocol is employed the system is said to have a “coherent memory.”
Protocols incorporated in hardware have been developed to maintain memory coherence. Many multiprocessor systems maintain memory coherence with a snoopy protocol. This protocol relies on every processor or memory controller monitoring (or “snooping”) all requests to memory. Each processor, or more specifically the cache unit of each processor, independently determines if accesses made by another processor require an update. Snoopy protocols are usually built around a central bus (a snoopy bus). Snoopy bus protocols are very common, and many small-scale systems utilizing snoopy protocols are commercially available.
Alternatively, to maintain memory coherence across the system, a directory-based protocol uses a directory that contains memory-coherence control information. The directory, usually part of the memory subsystem, has an entry for each main memory location with state information indicating whether the memory data may also exist elsewhere in the system. The directory-based coherence protocol specifies all transitions and transactions to be taken in response to a memory request. Any action taken on a memory region, such as a cache line or page, is reflected in the state stored in the directory.
Memory coherence is often referred to as “cache coherence.” Each processor may have a local copy of data from shared memory, but that copy would almost always be in a cache or the local copy could be considered a cached copy.